FIG. 1 shows a block Diagram of a Direct Conversion receiver 10 as is known in the art. This Direct Conversion receiver 10 is extremely sensitive to problems typically associated with the existence of DC offset components in the baseband Intermediate Frequency (IF) output generated by the Direct Conversion receiver. These problems range from self interference to attack-time degradation. As will be appreciated, a major source of unwanted DC offset occurs when the Local Oscillator (LO) signal 20 applied to the down-mixing circuits 30 leaks into the radiofrequency (RF) input port 32 of the down-mixing circuits 30 and mixes with itself. Assuming this DC offset remains a fixed value, it can be compensated for by the use of several well known methods, such as, for example, trimming, offset null adjustments, or DC blocking capacitors. Unfortunately, the DC offset components generated by LO mixing are not fixed and may become time variant when Automatic Gain Control (AGC) is employed to stabilize the gain response of Radio Frequency (RF) amplifier 40 and LO signal 20 leaks into the RF amplifier input 42. Under these circumstances, the LO signal 20 that leaks into the RF amplifier input 42 is subjected to AGC action, thus causing a varying amount of LO signal 20 at the RF input port 32 of the down-mixer 30. This in turn, results in a varying DC offset in the baseband IF signal 110 of Direct Conversion receiver 10.
While fixed DC offset signals in the baseband IF can be compensated for by the techniques suggested herein above, it will be appreciated by those skilled in the art that a varying DC offset signal, which by definition is an Alternating Current (AC) signal, cannot be completely canceled with fixed adjustments alone. It would be extremely advantageous therefore to provide a DC offset compensation circuit that also compensates for varying DC offsets in the baseband IF signal of a radio receiver 10 as a consequence of the before-mentioned LO mixing.